This application claims priority from Korean Patent Application No. 10-2003-7415, filed on 6 Feb. 2003, the entire contents of which are hereby incorporated by reference.
Field of the Invention
The present invention relates to a calculator of a microprocessor, and more particularly, to an incrementer.
Description of the Related Art
An incrementer is an adder or a counter for adding a binary “1” to an input operand. In a microprocessor, an incrementer performs various operations including calculation of 2's complements of Boolean logic or addition of a binary “1” to an input operand.
A conventional incrementer using a full adder has low operating speed because it must wait for transmission of a carry bit. Also, since the conventional incrementer includes a circuit for processing the carry bit, it occupies a large area of a microprocessor chip.
A zero-stopping incrementer, using many static logic gates, is discussed in U.S. Pat. No. 5,635,858. The zero-stopping incrementer determines whether the input operand is an even number or odd number. If the input operand is an even number, the zero-stopping incrementer changes a least significant bit (LSB) to a binary “1”. For an odd number, the zero-stopping incrementer searches for the first binary “0” beginning with the LSB, changes that binary “0” to a binary “1” and all preceding binary “1s” into binary “0s”. However, the zero-stopping incrementer occupies a large area of the microprocessor chip due to use of many static logic gates.